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Section 7 DMA Controller
Bits 2 to 0—Data Transfer Select 2B to 0B (DTS2B, DTS1B, DTS0B): These bits select the
data transfer activation source. The selectable activation sources differ between normal mode and
block transfer mode.
Normal mode
Bit 2
Bit 1
DTS2B
DTS1B
0
0
1
1
0
1
Block transfer mode
Bit 2
Bit 1
Bit 0
DTS2B
DTS1B
DTS0B Description
0
0
0
1
1
0
1
1
0
0
1
1
0
1
The same internal interrupt can be selected to activate two or more channels. The channels are
activated in a priority order, highest priority first. For the priority order, see section 7.4.9,
Multiple-Channel Operation.
Rev. 4.00 Jan 26, 2006 page 228 of 938
REJ09B0276-0400
Bit 0
DTS0B
Description
0
Auto-request (burst mode)
1
Cannot be used
0
Auto-request (cycle-steal mode)
1
Cannot be used
0
Cannot be used
1
Cannot be used
Falling edge of DREQ
0
Low level input at DREQ
1
Compare match/input capture A interrupt from 16-bit timer channel 0
Compare match/input capture A interrupt from 16-bit timer channel 1
Compare match/input capture A interrupt from 16-bit timer channel 2
Conversion-end interrupt from A/D converter
Cannot be used
Cannot be used
Falling edge of DREQ
Cannot be used
(Initial value)
(Initial value)
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