Block Diagram - Renesas H8/3067 Series User Manual

18.2.2

Block Diagram

Figure 18.1 shows a block diagram of the flash memory.
Internal data bus (upper 8 bits)
Internal data bus (lower 8 bits)
FLMCR
EBR
RAMCR
FLMSR
Legend:
FLMCR: Flash memory control register*
EBR: Erase block register*
RAMCR: RAM control register*
FLMSR: Flash memory status register*
Notes: 1. Functions as the FWE pin in the flash memory and flash memory R versions, and as
the RESO pin in the mask ROM versions.
2. The registers that control the flash memory (FLMCR, EBR, RAMCR, and FLMSR) are
used in the flash memory and flash memory R versions only. They are not provided in
the mask ROM versions. Reading the corresponding addresses in a mask ROM version
will always return 1s, and writes to these addresses are disabled.
Bus interface/controller
H'00000
H'00002
On-chip Flash memory
(128 kB)
H'1FFFC
H'1FFFE
even address odd address
2
2
2
2
Figure 18.1 Block Diagram of Flash Memory
Operating
mode
H'00001
H'00003
H'1FFFD
H'1FFFF
Rev. 4.00 Jan 26, 2006 page 609 of 938
Section 18 ROM
1
FWE pin*
Mode pins
REJ09B0276-0400