Timing Of Clearing Of Status Flags - Renesas H8/3067 Series User Manual

Renesas 16-bit single-chip microcomputer
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Section 9 16-Bit Timer
Timing of Setting of Overflow Flag (OVF): OVF is set to 1 when TCNT overflows from
H'FFFF to H'0000 or underflows from H'0000 to H'FFFF. Figure 9.35 shows the timing.
φ
TCNT
Overflow
signal
OVF
OVI
9.5.2

Timing of Clearing of Status Flags

If the CPU reads a status flag while it is set to 1, then writes 0 in the status flag, the status flag is
cleared. Figure 9.36 shows the timing.
φ
Address
IMF, OVF
Rev. 4.00 Jan 26, 2006 page 382 of 938
REJ09B0276-0400
Figure 9.35 Timing of Setting of OVF
T
Figure 9.36 Timing of Clearing of Status Flags
TISR write cycle
T
T
1
2
TISR address
3

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