Renesas H8/3067 Series User Manual page 788

Renesas 16-bit single-chip microcomputer
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Appendix A Instruction Set
6. Branching instructions
Mnemonic
BRA d:8 (BT d:8)
BRA d:16 (BT d:16)
BRN d:8 (BF d:8)
BRN d:16 (BF d:16)
BHI d:8
BHI d:16
BLS d:8
BLS d:16
BCC d:8 (BHS d:8)
BCC d:16 (BHS d:16)
BCS d:8 (BLO d:8)
BCS d:16 (BLO d:16)
BNE d:8
BNE d:16
BEQ d:8
BEQ d:16
BVC d:8
BVC d:16
BVS d:8
BVS d:16
BPL d:8
BPL d:16
BMI d:8
BMI d:16
BGE d:8
BGE d:16
BLT d:8
BLT d:16
BGT d:8
BGT d:16
Rev. 4.00 Jan 26, 2006 page 764 of 938
REJ09B0276-0400
Addressing Mode and
Instruction Length (bytes)
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
2
4
Branch
Operation
Condition
I
     
If condition
Always
is true then
     
PC ←
     
Never
PC+d else
next;
     
C ∨ Z = 0
     
     
C ∨ Z = 1
     
     
     
C = 0
     
     
C = 1
     
     
Z = 0
     
     
Z = 1
     
     
V = 0
     
     
V = 1
     
     
N = 0
     
     
N = 1
     
     
N⊕V = 0
     
     
N⊕V = 1
     
Z ∨ (N⊕V)
     
= 0
     
No. of
1
States*
Condition Code
H N Z
V C
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6

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