Sci Interrupts - Renesas H8/3067 Series User Manual

Renesas 16-bit single-chip microcomputer
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Section 13 Serial Communication Interface
13.4

SCI Interrupts

The SCI has four interrupt request sources: the transmit-end interrupt (TEI), receive-error interrupt
(ERI), receive-data-full interrupt (RXI), and transmit-data-empty interrupt (TXI). Table 13.12 lists
the interrupt sources and indicates their priority. These interrupts can be enabled or disabled by the
TIE, RIE, and TEIE bits in SCR. Each interrupt request is sent separately to the interrupt
controller.
A TXI interrupt is requested when the TDRE flag is set to 1 in SSR. A TEI interrupt is requested
when the TEND flag is set to 1 in SSR. A TXI interrupt request can activate the DMAC to transfer
data. Data transfer by the DMAC automatically clears the TDRE flag to 0. A TEI interrupt request
cannot activate the DMAC.
An RXI interrupt is requested when the RDRF flag is set to 1 in SSR. An ERI interrupt is
requested when the ORER, PER, or FER flag is set to 1 in SSR. An RXI interrupt can activate the
DMAC to transfer data. Data transfer by the DMAC automatically clears the RDRF flag to 0. An
ERI interrupt request cannot activate the DMAC.
The DMAC can be activated by interrupts from SCI channel 0.
Table 13.12 SCI Interrupt Sources
Interrupt Source
ERI
RXI
TXI
TEI
Rev. 4.00 Jan 26, 2006 page 534 of 938
REJ09B0276-0400
Description
Receive error (ORER, FER, or PER)
Receive data register full (RDRF)
Transmit data register empty (TDRE)
Transmit end (TEND)
Priority
High
Low

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