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Interrupt Priority Register B (IPRB): IPRB is an 8-bit readable/writable register in which
interrupt priority levels can be set.
Bit
7
IPRB7
Initial value
0
Read/Write
R/W
Priority level B7
Selects the priority level of 8-bit timer channel 0, 1 interrupt requests
IPRB is initialized to H'00 by a reset and in hardware standby mode.
6
5
IPRB6
IPRB5
0
0
R/W
R/W
R/W
Reserved bit
Priority level B5
Selects the priority level of DMAC
interrupt requests (channels 0 and 1)
Priority level B6
Selects the priority level of 8-bit timer channel 2, 3 interrupt requests
Section 5 Interrupt Controller
4
3
2
IPRB3
IPRB2
0
0
0
R/W
R/W
Priority level B2
Selects the priority level of
SCI channel 1 interrupt requests
Priority level B3
Selects the priority level of SCI
channel 0 interrupt requests
Rev. 4.00 Jan 26, 2006 page 99 of 938
1
0
IPRB1
0
0
R/W
R/W
Reserved bit
Priority level B1
Selects the priority level
of SCI channel 2 interrupt
requests
REJ09B0276-0400
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