Renesas H8/3067 Series User Manual page 430

Section 10 8-Bit Timers
Bits 4 and 3—Counter Clear 1 and 0 (CCLR1 and CCLR0): These bits select how TCNT is
cleared: by compare match A or B, or input capture B..
Bit 4 Bit 3
CCLR1 CCLR0 Description
0 0 Clearing is disabled
1 Cleared by compare match A
1 0 Cleared by compare match B/ input capture B
1 Cleared by input capture B
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REJ09B0276-0400
(Initial value)