Section 6 Bus Controller
6.2.6
Chip Select Control Register (CSCR)
CSCR is an 8-bit readable/writable register that enables or disables output of chip select signals
to CS
(CS
).
7
4
If output of a chip select signal is enabled by a setting in this register, the corresponding pin
functions as a chip select signal (CS
be modified in single-chip mode.
Bit
7
CS7E
Initial value
0
Read/Write :
R/W
CSCR is initialized to H'0F by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 4—Chip Select 7 to 4 Enable (CS7E to CS4E): These bits enable or disable output of
the corresponding chip select signal.
Bit n
CSnE
Description
Output of chip select signal CSn is disabled
0
Output of chip select signal CSn is enabled
1
Note: n = 7 to 4
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to CS
) output regardless of any other settings. CSCR cannot
7
4
6
5
CS6E
CS5E
0
0
R/W
R/W
Chip select 7 to 4 enable
These bits enable or disable
chip select signal output
4
3
CS4E
—
0
1
R/W
—
2
1
—
—
1
1
—
—
Reserved bits
(Initial value)
0
—
1
—