Renesas H8/3067 Series User Manual page 660

Section 18 ROM
Increment
verify address
No
Notes: 1. Preprogramming (setting erase block data to all 0s) is not necessary.
2. The values of x, y, z, α, β, γ, ε, η, and N are shown in section 21.2.6, Flash Memory Characteristics.
3. Verify data is read in 16-bit (word) units. (Byte-unit reading is also possible.)
4. Set only one bit in EBR two or more bits must not be set simultaneously.
5. Erasing is performed in block units. To erase multiple blocks, each block must be erased in turn.
Figure 18.12 Erase/Erase-Verify Flowchart (Single-Block Erasing)
Rev. 4.00 Jan 26, 2006 page 636 of 938
REJ09B0276-0400
1
*
Start
Set SWE bit in FLMCR
Wait (x) µs
Erase counter n ← 1
Set EBR
Enable WDT
Set ESU bit in FLMCR
Wait (y) µs
Set E bit in FLMCR
Wait (z) ms
Clear E bit in FLMCR
Wait (α) µs
Clear ESU bit in FLMCR
Wait (β) µs
Disable WDT
Set EV bit in FLMCR
Wait (γ) µs
Set block start address
to verify address
H'FF dummy write to verify address
Wait (ε) µs
Read verify data
Verify data = all 1s?
Yes
Last address of block?
Yes
Clear EV bit in FLMCR
Wait (η) µs
Clear SWE bit in FLMCR
End of erasing
2
*
4
*
5
*
2
*
Start of erase
2
*
End of erase
2
*
2
*
2
*
2
*
3
*
No
n ← n + 1
2
*
Clear EV bit in FLMCR
Wait (η) µs
n>N?
Clear SWE bit in FLMCR
Erase failure
Re-erase
2
*
2
*
No
Yes