Tables Of Instructions Classified By Function - Renesas H8/3067 Series User Manual

Section 2 CPU
2.6.3

Tables of Instructions Classified by Function

Tables 2.3 to 2.10 summarize the instructions in each functional category. The operation notation
used in these tables is defined next.
Operation Notation
Rd General register (destination)*
Rs General register (source)*
Rn General register*
ERn General register (32-bit register or address register)
(EAd) Destination operand
(EAs) Source operand
CCR Condition code register
N N (negative) flag of CCR
Z Z (zero) flag of CCR
V V (overflow) flag of CCR
C C (carry) flag of CCR
PC Program counter
SP Stack pointer
#IMM Immediate data
disp Displacement
+ Addition
– Subtraction
×
Multiplication
÷
Division
∧
AND logical
∨
OR logical
⊕
Exclusive OR logical
→
Move
¬ NOT (logical complement)
:3/:8/:16/:24 3-, 8-, 16-, or 24-bit length
Note: * General registers include 8-bit registers (R0H to R7H, R0L to R7L), 16-bit registers (R0 to
R7, E0 to E7), and 32-bit data or address registers (ER0 to ER7).
Rev. 4.00 Jan 26, 2006 page 36 of 938
REJ09B0276-0400