Operation; Tcnt Count Timing - Renesas H8/3067 Series User Manual

10.4

Operation

10.4.1

TCNT Count Timing

TCNT is incremented by input clock pulses (either internal or external).
Internal Clock: Three different internal clock signals (φ/8, φ/64, or φ/8192) divided from the
system clock (φ) can be selected, by setting bits CKS2 to CKS0 in TCR. Figure 10.8 shows the
count timing.
φ
Internal clock
TCNT input clock
TCNT
Note: Even when the same internal clock is selected for both the 16- and 8-bit timers, they do
not operate in the same manner because the count-up edge differs.
External Clock: Three incrementation methods can be selected by setting bits CKS2 to CKS0 in
TCR: on the rising edge, the falling edge, and both rising and falling edges.
The pulse width of the external clock signal must be at least 1.5 serial clocks when a single edge is
selected, and at least 2.5 system clocks when both edges are selected. Shorter pulses will not be
counted correctly.
Figure 10.9 shows the timing for incrementation on both edges of the external clock signal.
N − 1
Figure 10.8 Count Timing for Internal Clock Input
N
Rev. 4.00 Jan 26, 2006 page 415 of 938
Section 10 8-Bit Timers
N + 1
REJ09B0276-0400