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Section 13 Serial Communication Interface
Data length:
Receive error detection:
• Full-duplex communication
The transmitting and receiving sections are independent, so the SCI can transmit and receive
simultaneously. The transmitting and receiving sections are both double-buffered, so serial
data can be transmitted and received continuously.
• The following settings can be made for the serial data to be transferred:
LSB-first or MSB-first transfer
Inversion of data logic level
• Built-in baud rate generator with selectable bit rates
• Selectable transmit/receive clock sources: internal clock from baud rate generator, or external
clock from the SCK pin
• Four types of interrupts
Transmit-data-empty, transmit-end, receive-data-full, and receive-error interrupts are requested
independently. The transmit-data-empty and receive-data-full interrupts from SCI0 can
activate the DMA controller (DMAC) to transfer data.
Features of the smart card interface are listed below.
• Asynchronous communication
Data length: 8 bits
Parity bits generated and checked
Error signal output in receive mode (parity error)
Error signal detect and automatic data retransmit in transmit mode
Supports both direct convention and inverse convention
• Built-in baud rate generator with selectable bit rates
• Three types of interrupts
Transmit-data-empty, receive-data-full, and transmit/receive-error interrupts are requested
independently. The transmit-data-empty and receive-data-full interrupts can activate the DMA
controller (DMAC) to transfer data.
Rev. 4.00 Jan 26, 2006 page 478 of 938
REJ09B0276-0400
8 bits
overrun errors
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