Renesas H8/3067 Series User Manual page 409

Renesas 16-bit single-chip microcomputer
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Contention between TCNT Word Write and Increment: If an increment pulse occurs in the T
state of a TCNT word write cycle, writing takes priority and TCNT is not incremented.
Figure 9.38 shows the timing in this case.
φ
Address bus
Internal write signal
TCNT input clock
TCNT
Figure 9.38 Contention between TCNT Word Write and Increment
TCNT word write cycle
T
T
1
2
TCNT address
N
TCNT write data
Rev. 4.00 Jan 26, 2006 page 385 of 938
Section 9 16-Bit Timer
T
3
M
REJ09B0276-0400
3

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