Renesas H8/3067 Series User Manual page 665

Memory read verify mode
RD VF PR ER FLER=0
P=1 or E=1
P=0 and E=0
Program mode
Erase mode
RD VF PR ER FLER=0
Error occurrence
Error protection mode
RD VF PR ER FLER=1
RD : Memory read enable
VF : Verify-read enable
PR : Programming enable
ER : Erasing enable
(When High level apply to FWE pin in modes 5 and 7 (on-chip ROM enabled))
The error protection function is disabled for errors other than the FLER bit set conditions. If
considerable time elapses up to transit to this protection state, the flash memory may already be
damaged. As a result, this function cannot completely protect the flash memory against damage.
Therefore, to prevent such erroneous operation, operation must be carried out correctly in
according with the program/erase algorithms in the state that flash write enable (FWE) is set. In
addition, the operation must be always carried out correctly by supervising microcomputer errors
inside and outside the chip with the watchdog timer, etc. At transition to this protection mode, the
flash memory may be erroneously programmed or erased, or its abort may result in incomplete
Reset or hardware standby mode
Software
standby mode
Software standby
mode release
RD
VF
PR
ER
INIT
Figure 18.13 Flash Memory State Transitions
Error protection mode
(software standby mode)
RD VF PR ER INIT FLER=1
: Memory read disabled
: Verify-read disabled
: Programming disabled
: Erasing disabled
: Registers (FLMCR, EBR) initialize state
Rev. 4.00 Jan 26, 2006 page 641 of 938
Section 18 ROM
Reset or standby mode
(hardware protection)
RD VF PR ER INIT FLER=0
Reset or hardware
standby mode
REJ09B0276-0400