Renesas H8/3067 Series User Manual page 392

Renesas 16-bit single-chip microcomputer
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Section 9 16-Bit Timer
• Output compare output timing
The compare match signal is generated in the last state in which TCNT and the general register
match (when TCNT changes from the matching value to the next value). When the compare
match signal is generated, the output value selected in TIOR is output at the output compare
pin (TIOCA or TIOCB). When TCNT matches a general register, the compare match signal is
not generated until the next counter clock pulse.
Figure 9.20 shows the output compare timing.
φ
TCNT input
clock
TCNT
GR
Compare
match signal
TIOCA,
TIOCB
Input Capture Function: The TCNT value can be captured into a general register when a
transition occurs at an input capture/output compare pin (TIOCA or TIOCB). Capture can take
place on the rising edge, falling edge, or both edges. The input capture function can be used to
measure pulse width or period.
Rev. 4.00 Jan 26, 2006 page 368 of 938
REJ09B0276-0400
N
N
Figure 9.20 Output Compare Output Timing
N + 1

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