Pin Configuration; Register Configuration - Renesas H8/3067 Series User Manual

5.1.3

Pin Configuration

Table 5.1 lists the interrupt pins.
Table 5.1 Interrupt Pins
Name
Nonmaskable interrupt
External interrupt request 5 to 0
Note: * In the flash memory and flash memory R versions, NMI input is sometimes disabled. For
details see 18.6.4, NMI Input Disable Conditions.
5.1.4

Register Configuration

Table 5.2 lists the registers of the interrupt controller.
Table 5.2 Interrupt Controller Registers
Address *
1
Name
H'EE012 System control register
H'EE014 IRQ sense control register
H'EE015 IRQ enable register
H'EE016 IRQ status register
H'EE018 Interrupt priority register A
H'EE019 Interrupt priority register B
Notes: 1. Lower 20 bits of the address in advanced mode.
2. Only 0 can be written, to clear flags.
Abbreviation I/O
NMI Input Nonmaskable interrupt*, rising edge or
IRQ to IRQ
Input Maskable interrupts, falling edge or level
5 0
Abbreviation
SYSCR
ISCR
IER
ISR
IPRA
IPRB
Section 5 Interrupt Controller
Function
falling edge selectable
sensing selectable
R/W
R/W
R/W
R/W
R/(W) *
2
R/W
R/W
Rev. 4.00 Jan 26, 2006 page 93 of 938
Initial Value
H'09
H'00
H'00
H'00
H'00
H'00
REJ09B0276-0400