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C.5
Port 5 Block Diagram
Hardware standby
External bus
released
P5
n
WP5P:
Write to P5PCR
RP5P:
Read P5PCR
WP5D:
Write to P5DDR
WP5:
Write to port 5
RP5:
Read port 5
SSOE:
Software standby output port enable
n = 0 to 3
Software
standby
SSOE
Mode 6/7
Mode 6/7
Mode
1 to 5
Figure C.5 Port 5 Block Diagram
Appendix C I/O Port Block Diagrams
Reset
R
Q
P5 PCR
n
C
RP5P
WP5P
Mode 1 to 4
Reset
R
Q
P5 DDR
n
C
WP5D
Reset
R
Q
P5 DR
n
C
WP5
RP5
Rev. 4.00 Jan 26, 2006 page 883 of 938
D
D
D
REJ09B0276-0400
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