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Address *
Channel
2
H'FFF78
H'FFF79
H'FFF7A
H'FFF7B
H'FFF7C
H'FFF7D
H'FFF7E
H'FFF7F
Notes: 1. The lower 20 bits of the address in advanced mode are indicated.
2. Only 0 can be written in bits 3 to 0, to clear the flags.
1
Name
Timer control register 2
Timer I/O control register 2
Timer counter 2H
Timer counter 2L
General register A2H
General register A2L
General register B2H
General register B2L
Section 9 16-Bit Timer
Abbre-
viation
R/W
TCR2
R/W
TIOR2
R/W
TCNT2H
R/W
TCNT2L
R/W
GRA2H
R/W
GRA2L
R/W
GRB2H
R/W
GRB2L
R/W
Rev. 4.00 Jan 26, 2006 page 335 of 938
Initial
Value
H'80
H'88
H'00
H'00
H'FF
H'FF
H'FF
H'FF
REJ09B0276-0400
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