Renesas H8/3067 Series User Manual page 771

φ
CS to CS
5 2
(RAS to
5
RAS )
2
UCAS,
LCAS
RD (WE)
(high)
RFSH
Figure 21.18 DRAM Bus Timing (CAS Before RAS Refresh)
TR TR
p 1
t
RAD1
t
RP
t
CASD1
t
CSR1
t
RAD1
t
CSR1
Section 21 Electrical Characteristics
TR
2
t
RAS
t
CASD2
t
CHR
t
CAS3
t
CHR
t
RAS
Rev. 4.00 Jan 26, 2006 page 747 of 938
t
RAD2
t
RAD2
REJ09B0276-0400