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Section 10 8-Bit Timers
10.2.3
Time Constant Registers B (TCORB)
Bit
15
14
Initial value
1
1
Read/Write
R/W
R/W
Bit
15
14
Initial value
1
1
Read/Write
R/W
R/W
TCORB0 to TCORB3 are 8-bit readable/writable registers. The TCORB0 and TCORB1 pair, and
the TCORB2 and TCORB3 pair, can each be accessed as a 16-bit register by word access.
The TCORB value is constantly compared with the TCNT value. When a match is detected, the
corresponding compare match flag B (CMFB) is set to 1 in TCSR.
The timer output can be freely controlled by these compare match signals and the settings of
output/input capture edge select bits 3 and 2 (OIS3, OIS2) in TCSR.
When TCORB is used for input capture, it stores the TCNT value on detection of an external input
capture signal. At this time, the CMFB flag is set to 1 in the corresponding TCSR register. The
detected edge of the input capture signal is set in TCSR.
Each TCORB register is initialized to H'FF by a reset and in standby mode.
Rev. 4.00 Jan 26, 2006 page 404 of 938
REJ09B0276-0400
TCORB0
13
12
11
10
1
1
1
1
R/W
R/W
R/W
R/W
R/W
TCORB2
13
12
11
10
1
1
1
1
R/W
R/W
R/W
R/W
R/W
9
8
7
6
5
1
1
1
1
1
R/W
R/W
R/W
R/W
9
8
7
6
5
1
1
1
1
1
R/W
R/W
R/W
R/W
TCORB1
4
3
2
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
TCORB3
4
3
2
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
0
1
0
1
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