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Section 7 DMA Controller
For the detailed settings see section 7.3.4, Data Transfer Control Registers (DTCR).
Figure 7.9 shows a sample setup procedure for normal mode.
Normal mode
Set initial source address
Set initial destination address
Set transfer count
Set DTCRB (1)
Set DTCRA (1)
Read DTCRB
Set DTCRB (2)
Read DTCRA
Set DTCRA (2)
Normal mode
Note: Carry out settings 1 to 9 with the DEND interrupt masked in the CPU.
If an NMI interrupt occurs during the setup procedure, it may clear the DTME bit to 0, in
which case the transfer will not start.
Figure 7.9 Normal Mode Setup Procedure (Example)
Rev. 4.00 Jan 26, 2006 page 242 of 938
REJ09B0276-0400
1.
Set the initial source address in MARA.
2.
Set the initial destination address in MARB.
3.
Set the transfer count in ETCRA.
4.
Set the DTCRB bits as follows.
1
•
Clear the DTME bit to 0.
•
Set the DAID and DAIDE bits to select whether
MARB is incremented, decremented, or held fixed.
2
•
Select the DMAC activation source with bits
DTS2B to DTS0B.
5.
Set the DTCRA bits as follows.
•
Clear the DTE bit to 0.
3
•
Select byte or word size with the DTSZ bit.
•
Set the SAID and SAIDE bits to select whether
MARA is incremented, decremented, or held fixed.
•
Set or clear the DTIE bit to enable or disable the
4
CPU interrupt at the end of the transfer.
•
Clear the DTS0A bit to 0 and set the DTS2A
and DTS1A bits to 1 to select normal mode.
5
6.
Read DTCRB with DTME cleared to 0.
7.
Set the DTME bit to 1 in DTCRB.
8.
Read DTCRA with DTE cleared to 0.
9.
Set the DTE bit to 1 in DTCRA to enable the transfer.
6
7
8
9
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