Table of Contents
Advertisement
TPCR—TPC Output Control Register
Bit
7
6
G3CMS1
G3CMS0
Initial value
1
1
Read/Write
R/W
R/W
Group 2 compare match select 1 and 0
Bit 5
G2CMS1
Group 3 compare match select 1 and 0
Bit 7
Bit 6
G3CMS1
G3CMS0
0
0
1
0
1
1
5
4
3
G2CMS1
G2CMS0
G1CMS1
1
1
1
R/W
R/W
R/W
Group 1 compare match select 1 and 0
Bit 3
G1CMS1
Bit 4
G2CMS0
TPC output group 2 (TP
0
0
1
TPC output group 2 (TP
0
1
TPC output group 2 (TP
1
16-Bit Timer Channel Selected as Output Trigger
TPC output group 3 (TP
to TP
15
TPC output group 3 (TP
to TP
15
TPC output group 3 (TP
to TP
15
Appendix B Internal I/O Registers
H'FFFA1
2
1
G1CMS0
G0CMS1
G0CMS0
1
1
R/W
R/W
Group 0 compare match select 1 and 0
Bit 1
Bit 0
16-Bit Timer Channel Selected as Output Trigger
G0CMS1
G0CMS0
TPC output group 0 (TP
0
compare match in 16-bit timer channel 0
0
TPC output group 0 (TP
1
compare match in 16-bit timer channel 1
0
TPC output group 0 (TP
1
compare match in 16-bit timer channel 2
1
Bit 2
16-Bit Timer Channel Selected as Output Trigger
G1CMS0
TPC output group 1 (TP
0
compare match in 16-bit timer channel 0
0
TPC output group 1 (TP
1
compare match in 16-bit timer channel 1
0
TPC output group 1 (TP
1
1
compare match in 16-bit timer channel 2
16-Bit Timer Channel Selected as Output Trigger
to TP
) is triggered by compare match in 16-bit timer channel 0
11
8
to TP
) is triggered by compare match in 16-bit timer channel 1
11
8
to TP
) is triggered by compare match in 16-bit timer channel 2
11
8
) is triggered by compare match in 16-bit timer channel 0
12
) is triggered by compare match in 16-bit timer channel 1
12
) is triggered by compare match in 16-bit timer channel 2
12
Rev. 4.00 Jan 26, 2006 page 857 of 938
TPC
0
1
R/W
to TP
) is triggered by
3
0
to TP
) is triggered by
3
0
to TP
) is triggered by
3
0
to TP
) is triggered by
7
4
to TP
) is triggered by
7
4
to TP
) is triggered by
7
4
REJ09B0276-0400
Advertisement
Table of Contents
