Data
Address
Register
Bus
(Low)
Name
Width Bit 7
H'FFFC0
SMR
8
H'FFFC1
BRR
8
H'FFFC2
SCR
8
H'FFFC3
TDR
8
H'FFFC4
SSR
8
H'FFFC5
RDR
8
H'FFFC6
SCMR
8
Reserved area (access prohibited)
H'FFFC7
H'FFFC8
—
H'FFFC9
—
H'FFFCA
—
H'FFFCB
—
H'FFFCC
—
H'FFFCD
—
H'FFFCE
—
H'FFFCF
—
H'FFFD0
P1DR
8
H'FFFD1
P2DR
8
H'FFFD2
P3DR
8
H'FFFD3
P4DR
8
H'FFFD4
P5DR
8
H'FFFD5
P6DR
8
H'FFFD6
P7DR
8
H'FFFD7
P8DR
8
H'FFFD8
P9DR
8
H'FFFD9
PADR
8
H'FFFDA
PBDR
8
H'FFFDB
—
H'FFFDC
—
H'FFFDD
—
H'FFFDE
—
H'FFFDF
—
Bit Names
Bit 6
Bit 5
C/A
CHR
PE
TIE
RIE
TE
TDRE
RDRF
ORER
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
P1
P1
P1
7
6
5
P2
P2
P2
7
6
5
P3
P3
P3
7
6
5
P4
P4
P4
7
6
5
—
—
—
P6
P6
P6
7
6
5
P7
P7
P7
7
6
5
—
—
—
—
—
P9
5
PA
PA
PA
7
6
5
PB
PB
PB
7
6
5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Appendix B Internal I/O Registers
Bit 4
Bit 3
Bit 2
O/E
STOP
MP
RE
MPIE
TEIE
PER
TEND
FER/ER
S
—
SDIR
SINV
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
P1
P1
P1
4
3
2
P2
P2
P2
4
3
2
P3
P3
P3
4
3
2
P4
P4
P4
4
3
2
—
P5
P5
3
2
P6
P6
P6
4
3
2
P7
P7
P7
4
3
2
P8
P8
P8
4
3
2
P9
P9
P9
4
3
2
PA
PA
PA
4
3
2
PB
PB
PB
4
3
2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Rev. 4.00 Jan 26, 2006 page 789 of 938
Module
Name
Bit 1
Bit 0
CKS1
CKS0
SCI
channel 2
CKE1
CKE0
MPB
MPBT
—
SMIF
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
P1
P1
Port1
1
0
P2
P2
Port2
1
0
P3
P3
Port3
1
0
P4
P4
Port4
1
0
P5
P5
Port5
1
0
P6
P6
Port6
1
0
P7
P7
Port7
1
0
P8
P8
Port8
1
0
P9
P9
Port9
1
0
PA
PA
PortA
1
0
PB
PB
PortB
1
0
—
—
—
—
—
—
—
—
—
—
REJ09B0276-0400