Wait Mode; Background Mode - NXP Semiconductors MC9S08SU16 Reference Manual

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Operation modes

10.4.2 Wait mode

The WAIT instruction enables interrupts by clearing the I bit in the CCR. It then halts the
clocks to the CPU to reduce overall power consumption while the CPU is waiting for the
interrupt or reset event that will wake the CPU from wait mode. When an interrupt or
reset event occurs, the CPU clocks will resume and the interrupt or reset event will be
processed normally.
If a serial BACKGROUND command is issued to the MCU through the background
debug interface while the CPU is in wait mode, CPU clocks will resume and the CPU
will enter active background mode where other serial background commands can be
processed. This ensures that a host development system can still gain access to a target
MCU even if it is in wait mode.
While in wait mode, there are some restrictions on which background debug commands
can be used. Only the BACKGROUND command and memory-access-with-status
commands are available while in wait mode. The memory-access-with-status commands
do not allow memory access, but they report an error indicating that the CPU is in either
stop or wait mode. The BACKGROUND command can be used to wake the CPU from
wait mode and enter active background mode.

10.4.3 Background mode

Background instruction (BGND) is not used in normal user programs because it forces
the CPU to stop processing user instructions and enter the active background mode
waiting for serial background commands. The only way to resume execution of the user
program is through reset or by a host debug system issuing a GO, TRACE1, or TAGGO
serial command through the background debug interface.
Software-based breakpoints can be set by replacing an opcode at the desired breakpoint
address with the BGND opcode. When the program reaches this breakpoint address, the
CPU is forced to active background mode rather than continuing the user program.
The active background mode functions are managed through the background debug
controller (BDC) in the HCS08 V6 core. The BDC provides the means for analyzing
MCU operation during software development. Active background mode is entered in any
of the following ways:
• When the BKGD pin is low at the time the MCU exits reset.
• When a BACKGROUND command is received through the BKGD pin.
138
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
NXP Semiconductors

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