Chip Specific Inter-Integrated Circuit - NXP Semiconductors MC9S08SU16 Reference Manual

Chapter 21
Inter-Integrated Circuit (I2C)

21.1 Chip specific inter-integrated circuit

This device contains an inter-integrated circuit (I2C) module for communication with
other integrated circuits. It supports up to 400 kb/s communication speed. The digital
glitch filter implemented in the PORT module, controlled by the PORT registers, is
clocked from the bus clock and thus has filter granularity in bus clock cycle counts.
Customization:
• Primary clock: BUSCLK (20 MHz)
• Alternate clock: None
• Enable SMBus feature
• The following table summarizes the signal connection of I2C module.
Module
I2C
This module supports wakeup in Wait and Stop modes.
21.2 Introduction
For the chip-specific implementation details of this module's
instances, see the chip configuration information.
NXP Semiconductors
Table 21-1. I2C module signals
SDA
SCL
Internal clock
NOTE
NOTE
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
connection
Signal Connect to
PTA5/SDA
PTA4/SCL
BUSCLK
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