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26.4.3
PWM Fault Control Register: Low (PWM_FCTRLL)..................................................................................508
26.4.4
PWM Fault Control Register: High (PWM_FCTRLH).................................................................................510
26.4.5
PWM Fault Status Acknowledge Register: Low (PWM_FLTACKL).......................................................... 510
26.4.6
PWM Fault Status Acknowledge Register: High (PWM_FLTACKH).........................................................511
26.4.7
PWM Output Control Register: Low (PWM_OUTL)................................................................................... 513
26.4.8
PWM Output Control Register: High (PWM_OUTH).................................................................................. 514
26.4.9
PWM Counter Register: Low (PWM_CNTRL)............................................................................................ 514
26.4.10 PWM Counter Register: High (PWM_CNTRH)........................................................................................... 515
26.4.11 PWM Counter Register: Low (PWM_CMODL)...........................................................................................515
26.4.12 PWM Counter Register: High (PWM_CMODH)..........................................................................................516
26.4.13 PWM Value Register: Low (PWM_VALnL)................................................................................................ 516
26.4.14 PWM Value Register: High (PWM_VALnH)...............................................................................................517
26.4.15 PWM Deadtime Register: Low (PWM_DTIMnL)........................................................................................ 518
26.4.16 PWM Deadtime Register: High (PWM_DTIMnH).......................................................................................518
26.4.17 PWM Disable Mapping Registers 1: Low (PWM_DMAP1L)...................................................................... 519
26.4.18 PWM Disable Mapping Registers 1: High (PWM_DMAP1H).....................................................................520
26.4.19 PWM Disable Mapping Registers 2: Low (PWM_DMAP2L)...................................................................... 520
26.4.20 PWM Configure Register: Low (PWM_CNFGL).........................................................................................520
26.4.21 PWM Configure Register: High (PWM_CNFGH)........................................................................................521
26.4.22 PWM Channel Control Register: Low (PWM_CCTRLL)............................................................................ 522
26.4.23 PWM Channel Control Register: High (PWM_CCTRLH)........................................................................... 524
26.4.24 PWM Pulse Edge Control Register: Low (PWM_PECTRLL)......................................................................524
26.4.25 PWM Compare Invert Register: High (PWM_CINVH)................................................................................525
26.5
Resets............................................................................................................................................................................ 526
26.6
Clocks........................................................................................................................................................................... 526
26.7
Interrupts....................................................................................................................................................................... 527
27.1
Introduction...................................................................................................................................................................529
NXP Semiconductors
Title
Chapter 27
Development support
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Page
29
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