Cmp Functional Modes - NXP Semiconductors MC9S08SU16 Reference Manual

CMP Functional Description

18.11.1 CMP Functional Modes

There are three main sub-blocks to the comparator module: the comparator itself, the
window function and the filter function. The filter, CR0[FILTER_CNT] can be clocked
from an internally or external clock source. Additionally, the filter is programmable with
respect to how many samples must agree before a change on the output is registered. In
the simplest case, only 1 sample must agree. In this case, the filter acts as a simple
sampler.
The external sample input is enabled using CR1[SE]. When set, the output of the
comparator is sampled only on rising edges of the sample input.
The "windowing mode" is enabled by setting CR1[WE]. When set, the comparator output
is sampled only when the WINDOW input signal is equal to one. This feature can be
used to ignore the comparator output during time periods in which the input voltages are
not valid. This is especially useful when implementing zero-crossing-detection for certain
PWM applications.
The comparator filter and sampling features can be combined as shown in the following
table. Individual modes are discussed below.
Mode # CR1[EN] CR1[WE]
1 0
2A 1
2B 1
3A 1
3B 1
4A 1
4B 1
5A 1
5B 1
6 1
302
Table 18-2. Comparator Sample/Filter Controls
CR0[FILTER_C
CR1[SE]
NT]
X X
0 0 0x00
0 0
0 1 0x01
0 0 0x01
0 1 > 0x01
0 0 > 0x01
1 0 0x00
1 0
1 0 0x01
Table continues on the next page...
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
FPR[FILT_PER]
X X
X
X 0x00
X
> 0x00
X
> 0x00
X
X 0x00
0x01 - 0xFF
Operation
Disabled
Refer to the Disabled Mode (#
Continuous Mode
Refer to the Continuous Mode (#s
2A & 2B).
Sampled, Non-Filtered mode
Refer to the Sampled, Non-Filtered
Mode (#s 3A & 3B).
Sampled, Filtered mode
Refer to the Sampled, Filtered Mode
(#s 4A & 4B).
Windowed mode
Comparator output is sampled on
every rising bus clock edge when
SAMPLE=1 to generate COUTA
Refer to the Windowed Mode (#s 5A
& 5B).
Windowed/Resampled mode
Comparator output is sampled on
every rising bus clock edge when
SAMPLE=1 to generate COUTA,
NXP Semiconductors
1).