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Functional Description
FTM counting is up-down
MODH:L = 0x0004
FTM counter
TOF bit
period of FTM counter clock
19.5.3.3 Free running counter
If (MODH:L = 0x0000 or MODH:L = 0xFFFF), the FTM counter is a free running
counter. In this case, the FTM counter runs free from 0x0000 through 0xFFFF and the
TOF bit is set when the FTM counter changes from 0xFFFF to 0x0000 See the following
figure.
MODH:L = 0x0000
FTM counter
...
TOF bit
Figure 19-6. Example when the FTM counter is a free running
19.5.3.4 Counter reset
Any write to CNTH or CNTL register resets the FTM counter to the value of 0x0000 and
the channels output to its initial value, except for channels in output compare mode.
19.5.4 Input capture mode
The input capture mode is selected when (CPWMS = 0), (MSnB:MSnA = 0:0), and
(ELSnB:ELSnA ≠ 0:0).
332
0
1
2
3
4
set TOF bit
period of counting = 2 x MODH:L x period of FTM counter clock
Figure 19-5. Example of up-down counting
0x0003
0x0004
...
0xFFFE 0xFFFF
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
3
2
1
0
1
2
3
4
set TOF bit
0x0000 0x0001 0x0002 0x0003
set TOF bit
3
2
1
0
1
2
3
4
0x0004
0x0005 0x0006
...
NXP Semiconductors
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