Cmp Filter Period Register (Cmp_Fpr) - NXP Semiconductors MC9S08SU16 Reference Manual

Table of Contents

Advertisement

Field
5
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
4
Power Mode Select
PMODE
0
Low Speed (LS) comparison mode selected.
1
High Speed (HS) comparison mode selected.
3
Comparator INVERT
INV
This bit allows you to select the polarity of the analog comparator function. It is also driven to the COUT
output (on both the device pin and as SCR[COUT]) when CR1[OPE]=0.
0
Does not invert the comparator output.
1
Inverts the comparator output.
2
Comparator Output Select
COS
0
Set CMPO to equal COUT (filtered comparator output).
1
Set CMPO to equal COUTA (unfiltered comparator output).
1
Comparator Output Pin Enable
OPE
NOTE: This bit is always disabled in the device, writing 1 to this bit does not take effect.
0
The comparator output (CMPO) is not available on the associated CMPO output pin. Instead, the INV
bit is driven if the comparator owns the pin (usually a result of properly setting pin mux controls at the
SoC level). If the comparator does not own the pin, this bit has no effect. The pin is available for use
by other on-chip functions.
1
The comparator output (CMPO) is available on the associated CMPO output pin.
The comparator output (CMPO) is driven out on the associated CMPO output pin if the comparator
owns the pin. If the comparator does not own the pin, this bit has no effect.
The comparator output (CMPO) is driven out on the associated CMPO output pin.
0
Comparator Module Enable
EN
The EN bit enables the Analog Comparator Module. When the module is not enabled, it remains in the off
state, and consumes no power. When you select the same input from analog mux to the positive and
negative port, the comparator is disabled automatically.
0
Analog Comparator disabled.
1
Analog Comparator enabled.

18.10.3 CMP Filter Period Register (CMP_FPR)

Address: 68h base + 2h offset = 6Ah
Bit
7
Read
Write
Reset
0
NXP Semiconductors
CMP_CR1 field descriptions (continued)
6
5
0
0
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 18 Chip-specific ACMP information
Description
4
3
FILT_PER
0
0
2
1
0
0
0
0
297

Advertisement

Table of Contents
loading

This manual is also suitable for:

Mc9s08su16vfkMc9s08su8vfk

Table of Contents