Table of Contents
Advertisement
Field
110
6 consecutive samples must agree.
111
7 consecutive samples must agree.
3–1
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
0
Comparator hard block hysteresis control
HYSTCTR
Defines the programmable hysteresis level. The hysteresis values associated with each level is device-
specific. See the device's data sheet for the exact values.
0
Level 0
1
Level 1
25.6.6 PHCMP1 Control Register 1 (GDU_PHCMP1CR1)
Address: 20h base + 5h offset = 25h
Bit
7
Read
SE
Write
Reset
0
Field
7
Sample Enable
SE
At any given time, either SE or WE can be set. If a write to this register attempts to set both, then SE is set
and WE is cleared. However, avoid writing ones to both bit locations because this "11" case is reserved
and may change in future implementations.
0
Sampling mode not selected.
1
Sampling mode selected.
6
Windowing Enable
WE
At any given time, either SE or WE can be set. If a write to this register attempts to set both, then SE is set
and WE is cleared. However, avoid writing ones to both bit locations because this "11" case is reserved
and may change in future implementations.
0
Windowing mode not selected.
1
Windowing mode selected.
5
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
4
Power Mode Select
PMODE
0
Low Speed (LS) comparison mode selected.
1
High Speed (HS) comparison mode selected.
3
GDU Comparator INVERT
INV
NXP Semiconductors
GDU_PHCMP1CR0 field descriptions (continued)
6
5
0
WE
0
0
GDU_PHCMP1CR1 field descriptions
Table continues on the next page...
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Description
4
3
PMODE
INV
0
0
Description
Chapter 25 Gate Drive Unit (GDU)
2
1
COS
OPE
0
0
0
EN
0
443
Advertisement
Table of Contents
