I2C Range Address Register (I2C_Ra) - NXP Semiconductors MC9S08SU16 Reference Manual

Memory map/register definition
Field
0 Stop holdoff is disabled. The MCU's entry to stop mode is not gated.
1 Stop holdoff is enabled.
6 I2C Bus Stop Detect Flag
STOPF
Hardware sets this bit when the I2C bus's stop status is detected. The STOPF bit must be cleared by
writing 1 to it.
NOTE: The stop flag is only for the matched slave devices, therefore the master will not respond for it.
0 No stop happens on I2C bus
1 Stop detected on I2C bus
5 I2C Bus Stop or Start Interrupt Enable
SSIE
This bit enables the interrupt for I2C bus stop or start detection.
NOTE: To clear the I2C bus stop or start detection interrupt: In the interrupt service routine, first clear the
0 Stop or start detection interrupt is disabled
1 Stop or start detection interrupt is enabled
4 I2C Bus Start Detect Flag
STARTF
Hardware sets this bit when the I2C bus's start status is detected. The STARTF bit must be cleared by
writing 1 to it.
0 No start happens on I2C bus
1 Start detected on I2C bus
Reserved This field is reserved.
This read-only field is reserved and always has the value 0.

21.4.8 I2C Range Address register (I2C_RA)

Address: 18B0h base + 7h offset = 18B7h
Bit 7
Read
Write
Reset
0
Field
7–1 Range Slave Address
RAD
This field contains the slave address to be used by the I2C module. The field is used in the 7-bit address
scheme. If I2C_C2[RMEN] is set to 1, any nonzero value write enables this register. This register value
can be considered as a maximum boundary in the range matching mode.
0 This field is reserved.
Reserved This read-only field is reserved and always has the value 0.
372
I2C_SCS field descriptions (continued)
STOPF or STARTF bit by writing 1 to it, and then clear the IICIF bit in the status register. If this
sequence is reversed, the IICIF bit is asserted again.
6 5
0 0
I2C_RA field descriptions
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Description
4 3
RAD
0 0
Description
2 1
0 0
NXP Semiconductors
0
0
0