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Chapter 5
Clock management
5.1 Clock module
This device has ICS and LPO clock modules.
The internal clock source (ICS) module provides several clock source options for this
device. The module contains a frequency-locked loop (FLL) that is controllable by either
an internal or external reference clock. The module can select clock from the FLL or
bypass the FLL as a source of the MCU system clock. The selected clock source is
passed through a reduced bus divider, which allows a lower output clock frequency to be
derived.
An internal trimmed 32 kHz is the main clock source for ICS. It also can be used as
reference for windowed COP watchdog (WCOP)
An external clock input is available in this device which can be used as the reference of
ICS to generate system bus clock and analog-to-digital (ADC) modules.
The low-power oscillator (LPO) module is an on-chip low-power oscillator providing
around 20 kHz reference clock to windowed COP watchdog (WCOP).
5.2 System clock distribution
These series contain two on-chip clock sources:
• Internal clock source (ICS) module — The main clock source generator providing
bus clock and other reference clocks to core, memory and peripherals
• Low-power oscillator (LPO) module — The on-chip low-power oscillator in PMC
module providing 20 kHz reference clock to windowed COP watchdog (WCOP) to
meet IEC60730 safety standard.
NXP Semiconductors
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
65
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