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Memory map and register definition
Field
7–5
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
4
Switch On
SWON
This bit selects bandgap or temperature sensor output to the ADC channel, when the bit TEMPEN is
enabled.
0
Selects the temperature sensor output.
1
Selects the bandgap output.
3
Temperature sensor Enable
TEMPEN
This bit is the enable control to the temperature sensor.
0
Disables the temperature sensor.
1
Enables the temperature sensor.
2
High Temperature Detection Status
HTDS
This read-only bit indicates the temperature status. Writing a value takes no effect.
0
Junction temperature is below the alert level.
1
Junction temperature is above the alert level.
1
High Temperature Interrupt Enable
HTIE
0
Disables the high temperature interrupt.
1
Enables the high temperature interrupt.
0
High Temperature Interrupt Flag
HTIF
This bit is set to 1 when the HTDS status bit changes. This flag can only be cleared by writing a 1. Writing
a 0 takes no effect. If enabled (HTIE = 1), HTIF causes an interrupt request.
0
No change in the HTDS bit.
1
The HTDS bit changes.
14.7.4 Temperature Offset Step Trim Register (PMC_TPTM)
Address: 1850h base + 3h offset = 1853h
Bit
7
Read
TRMTPEN
Write
Reset
0
Field
7
Temperature offset Trim Enable
TRMTPEN
If the bit is set, the temperature sensor offset is enabled.
224
PMC_TPCTRLSTAT field descriptions
6
5
0
0
0
PMC_TPTM field descriptions
Table continues on the next page...
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Description
4
3
0
f
Description
2
1
TOT[3:0]
f
f
NXP Semiconductors
0
f
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