Table of Contents
Advertisement
Introduction
The following figure shows the receiver portion of the SCI.
16 x Baud
Rate Clock
From
Transmitter
LOOPS
Single-Wire
Loop Control
RSRC
From RxD Pin
RXINV
From RxD Pin
Active Edge
Detect
PE
PT
398
Internal Bus
(Read-only)
Divide
By 16
M
LBKDE
Data Recovery
WAKE
Wakeup
Logic
ILT
Parity
Checking
Figure 22-2. SCI receiver block diagram
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
SCID – Rx Buffer
11-Bit Receive Shift Register
H
8
7
6
5
4
3
2
Shift Direction
RWUID
RWU
RDRF
RIE
IDLE
ILIE
LBKDIF
LBKDIE
RXEDGIF
RXEDGIE
OR
ORIE
FE
FEIE
NF
NEIE
PF
PEIE
1
0
L
Rx Interrupt
Request
Error Interrupt
Request
NXP Semiconductors
Advertisement
Table of Contents
