Windowed/Filtered Mode (#7) - NXP Semiconductors MC9S08SU16 Reference Manual

18.11.1.7 Windowed/Filtered Mode (#7)

This is the most complex mode of operation for the comparator block, as it utilizes both
windowing and filtering features. It also has the highest latency of any of the modes. This
can be approximated: up to 1 bus clock synchronization in the window function +
((CR0[FILTER_CNT] X FPR[FILT_PER]) + 1) X bus clock for the filter function.
When any windowed mode is active, COUTA is clocked by the bus clock whenever
WINDOW = 1. The last latched value is held when WINDOW = 0.
EN, PMODE,HYSCTR
INP
INM
bus clock
FILT_PER
18.11.2 Power Modes
18.11.2.1 Wait Mode Operation
During Wait mode and if enabled, the CMP continues to operate normally. Also, if
enabled, a CMP interrupt can wake the MCU.
NXP Semiconductors
INTERNAL BUS
FILT_PER
COS INV
+
+
Polarity
-
Select
-
CMPO
WINDOW/SAMPLE
Clock
divided
Prescaler
bus
clock
Figure 18-11. Windowed/Filtered Mode
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 18 Chip-specific ACMP information
OPE
FILTER_CNT SE COUT
WE
0x01
1 > 0
Window
Filter
Control
Block
1
0
COUTA
CGMUX
SE=0
IER/F CFR/F
Interrupt
Control
IRQ
COUT
(TO OTHER SOC FUNCTIONS))
0
CMPO to
1
PAD
COS
311