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Address: Base address + 0h offset
Bit
7
Read
COCO
Write
Reset
0
Field
7
Conversion Complete Flag
COCO
Conversion Complete Flag. The COCO flag is a read-only bit set each time a conversion is completed
when the compare function is disabled (ADC_SC2[ACFE] = 0). When the compare function is enabled
(ADC_SC2[ACFE] = 1), the COCO flag is set upon completion of a conversion only if the compare result is
true. When the FIFO function is enabled (ADC_SC4[AFDEP] > 0), the COCO flag is set upon completion
of the set of FIFO conversion. This bit is cleared when ADC_SC1 is written or when ADC_RL is read.
0
Conversion not completed.
1
Conversion completed.
6
Interrupt Enable
AIEN
AIEN enables conversion complete interrupts. When COCO becomes set while AIEN is high, an interrupt
is asserted.
0
Conversion complete interrupt disabled.
1
Conversion complete interrupt enabled.
5
Continuous Conversion Enable
ADCO
ADCO enables continuous conversions.
0
One conversion following a write to the ADC_SC1 when software triggered operation is selected, or
one conversion following assertion of ADHWT when hardware triggered operation is selected. When
the FIFO function is enabled (AFDEP > 0), a set of conversions are triggered.
1
Continuous conversions are initiated following a write to ADC_SC1 when software triggered operation
is selected. Continuous conversions are initiated by an ADHWT event when hardware triggered
operation is selected. When the FIFO function is enabled (AFDEP > 0), a set of conversions are loop
triggered.
ADCH
Input Channel Select
The ADCH bits form a 5-bit field that selects one of the input channels.
00000-00111
01000-10011
10100-10101
10110
10111
11000-11100
11101
11110
11111
NXP Semiconductors
6
5
AIEN
ADCO
0
0
ADCx_SC1 field descriptions
AD0-AD7
V
SS
Reserved
Temperature Sensor
Bandgap
Reserved
V
REFH
V
REFL
Module disabled
NOTE: Reset FIFO in FIFO mode.
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 17 Analog-to-digital converter (ADC)
4
3
ADCH
1
1
Description
2
1
1
1
0
1
263
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