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Functional description
Programming or erasing the flash memory cannot be performed
if the bus clock runs at less than 0.8 MHz. Setting
FCLKDIV[FDIV] too high can destroy the flash memory due to
overstress. Setting FCLKDIV[FDIV] too low can result in
incomplete programming or erasure of the flash memory cells.
When the FCLKDIV register is written, FCLKDIV[FDIVLD] is set automatically. If
FCLKDIV[FDIVLD] is 0, the FCLKDIV register has not been written since the last
reset. If the FCLKDIV register has not been written, any flash program or erase
command loaded during a command write sequence will not execute and
FSTAT[ACCERR] will be set.
11.3.5.2 Command write sequence
The memory controller will launch all valid flash commands entered using a command
write sequence.
Before launching a command, FSTAT[ACCERR] and FSTAT[FPVIOL] must be cleared
and the FSTAT[CCIF] flag will be tested to determine the status of the current command
write sequence. If FSTAT[CCIF] is 0, indicating that the previous command write
sequence is still active, a new command write sequence cannot be started and all writes to
the FCCOB register are ignored.
The FCCOB parameter fields must be loaded with all required parameters for the flash
command being executed. Access to the FCCOB parameter fields is controlled via
FCCOBIX[CCOBIX].
Flash command mode uses the indexed FCCOB register to provide a command code and
its relevant parameters to the memory controller. First, the user must set up all required
FCCOB fields. Then they can initiate the command's execution by writing a 1 to
FSTAT[CCIF]. This action clears the CCIF command completion flag to 0. When the
user clears FSTAT[CCIF], all FCCOB parameter fields are locked and cannot be changed
by the user until the command completes (evidenced by the memory controller returning
FSTAT[CCIF] to1). Some commands return information to the FCCOB register array.
The generic format for the FCCOB parameter fields in flash command mode is shown in
the following table. The return values are available for reading after the FSTAT[CCIF]
flag has been returned to 1 by the memory controller. Writes to the unimplemented
parameter fields, FCCOBIX[CCOBIX] =110b and FCCOBIX[CCOBIX] = 111b, are
ignored with read from these fields returning 0x0000.
160
CAUTION
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
NXP Semiconductors
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