Fifo Operation - NXP Semiconductors MC9S08SU16 Reference Manual

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On completion of a conversion while the compare function is enabled, if the compare
condition is not true, ADC_SC1[COCO] is not set and no data is transferred to the result
registers. An ADC interrupt is generated on the setting of ADC_SC1[COCO] if the ADC
interrupt is enabled (ADC_SC1[AIEN] = 1).
On completion of all conversions while the compare function is enabled and FIFO
enabled, if none of the compare conditions are true when ADC_SC4[ACFSEL] is low or
if not all of compare conditions are true when ADC_SC4[ACFSEL] is high,
ADC_SC1[COCO] is not set. The compare data are transferred to the result registers
regardless of compare condition true or false when FIFO enabled.
The compare function can monitor the voltage on a channel
while the MCU is in Wait or Stop mode. The ADC interrupt
wakes the MCU when the compare condition is met.
The compare function can not work in continuous conversion
mode when FIFO enabled.

17.5.5 FIFO operation

The ADC module supports FIFO operation to minimize the interrupts to CPU in order to
reduce CPU loading in ADC interrupt service routines. This module contains two FIFOs
to buffer analog input channels and analog results respectively.
The FIFO function is enabled when the ADC_SC4[AFDEP] bits are set non-zero. The
FIFO depth is indicated by these bits. The FIFO supports up to eight level buffer.
The analog input channel FIFO is accessed by ADC_SC1[ADCH] bits, when FIFO
function is enabled. The analog channel must be written to this FIFO in order. The ADC
will not start the conversion if the channel FIFO is fulfilled below the level indicated by
the ADC_SC4[AFDEP] bits, no matter whether software or hardware trigger is set. Read
ADC_SC1[ADCH] will read the current active channel value. Write to
ADC_SC1[ADCH] will re-fill channel FIFO to initial new conversion. It will abort
current conversion and any other conversions that did not start. Write to the ADC_SC1
after all the conversions are completed or ADC is in idle state.
The result of the FIFO is accessed by ADC_R register, when FIFO function is enabled.
The result must be read via these two registers by the same order of analog input channel
FIFO to get the proper results. Don't read ADC_R until all of the conversions are
completed in FIFO mode. The ADC_SC1[COCO] bit will be set only when all
conversions indicated by the analog input channel FIFO complete whatever software or
NXP Semiconductors
Note
Note
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 17 Analog-to-digital converter (ADC)
275

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