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Chapter 22 Serial Communications Interface (SCI)
22.5.6 Additional SCI functions
The following sections describe additional SCI functions.
22.5.6.1 8- and 9-bit data modes
The SCI system, transmitter and receiver, can be configured to operate in 9-bit data mode
by setting SCI_C1[M]. In 9-bit mode, there is a ninth data bit to the left of the most
significant bit of the SCI data register. For the transmit data buffer, this bit is stored in T8
in SCI_C3. For the receiver, the ninth bit is held in SCI_C3[R8].
For coherent writes to the transmit data buffer, write to SCI_C3[T8] before writing to
SCI_D.
If the bit value to be transmitted as the ninth bit of a new character is the same as for the
previous character, it is not necessary to write to SCI_C3[T8] again. When data is
transferred from the transmit data buffer to the transmit shifter, the value in SCI_C3[T8]
is copied at the same time data is transferred from SCI_D to the shifter.
The 9-bit data mode is typically used with parity to allow eight bits of data plus the parity
in the ninth bit, or it is used with address-mark wake-up so the ninth data bit can serve as
the wakeup bit. In custom protocols, the ninth bit can also serve as a software-controlled
marker.
22.5.6.2 Stop mode operation
During all stop modes, clocks to the SCI module are halted.
No SCI module registers are affected in Stop mode.
The receive input active edge detect circuit remains active in Stop mode. An active edge
on the receive input brings the CPU out of Stop mode if the interrupt is not masked
(SCI_BDH[RXEDGIE] = 1).
Because the clocks are halted, the SCI module resumes operation upon exit from stop,
only in Stop mode. Software must ensure stop mode is not entered while there is a
character (including preamble, break and normal data) being transmitted out of or
received into the SCI module, that means SCI_S1[TC] =1, SCI_S1[TDRE] = 1, and
SCI_S2[RAF] = 0 must all meet before entering stop mode.
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
NXP Semiconductors
419
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