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In complementary channel operation, odd and even OUTCTRLn must be identical and
switched concurrently for proper operation. The even-numbered OUTn bits replace the
PWM generator outputs. The deadtime generators inserts deadtime whenever an even
OUTn bit toggles. Deadtime is not inserted when the odd OUTn bit toggles. The even
OUTn bit controls complementary channel pairs when the odd OUTn bit is set. However,
the even OUTn bit still controls complementary channel pairs with odd PWMn
deactivated if the odd OUTn bit is cleared. In other words, setting the odd OUTn bit
makes its corresponding PWMn the complement of its even pair, while clearing the odd
OUTn bit deactivates the odd PWMn. Please refer to the following figure.
Setting the OUTCTLn bits do not disable the PWM generators. They continue to run, but
no longer control the output pins. When the OUTCTLn bits are cleared, the outputs of the
PWM generator takes control of PWM outputs at the beginning of the next PWM cycle.
Please refer to the following figure.
Software can drive the PWM outputs, even when the PWM Enable (PWMEN) bit is set
to zero.
Avoid an unexpected deadtime insertion by clearing the OUTn
bits before setting and after clearing the OUTCTLn bits.
NXP Semiconductors
NOTE
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 26 Pulse Width Modulator (PWM)
495
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