Interrupts - NXP Semiconductors MC9S08SU16 Reference Manual

26.7 Interrupts

PWM sources can generate CPU interrupt requests:
• Reload flag (PWMF)—PWMF is set at the beginning of every reload cycle. The
reload interrupt enable bit, PWMRIE, enables PWMF to generate CPU interrupt
requests. PWMF and PWMRIE are in PWM control register (CTRL)
• Fault flags (FFLAG0–FFLAG3)—The FFLAGn bit is set when a logic one occurs on
the FAULTn pin. The fault pin interrupt enable bits, FIE0–FIE3, enable the FFLAGn
flags to generate CPU interrupt requests. FFLAG0–FFLAG3 are in the fault status
register. FIE0–FIE3 are in the fault control register
NXP Semiconductors
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 26 Pulse Width Modulator (PWM)
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