Inherent Addressing Mode (Inh); Relative Addressing Mode (Rel); Immediate Addressing Mode (Imm) - NXP Semiconductors MC9S08SU16 Reference Manual

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Addressing Modes

10.3.1 Inherent Addressing Mode (INH)

In this addressing mode, instructions either have no operands or all operands are in
internal CPU registers. In either case, the CPU does not need to access any memory
locations to complete the instruction. Examples:
NOP
;this instruction has no operands
CLRA
;operand is a CPU register

10.3.2 Relative Addressing Mode (REL)

Relative addressing mode is used to specify the destination location for branch
instructions. A signed two's complement byte offset value is located in the memory
location immediately following the opcode. The offset gives a branching range of -128 to
+127 bytes. In most assemblers, the programmer does not need to calculate the offset,
because the assembler determines the proper offset and verifies that it is within the span
of the branch.
During program execution, if a branch condition is true, the signed offset is sign-
extended to a 16-bit value and is added to the current contents of the program counter,
which causes program execution to continue at the branch destination address. If a branch
condition is false, the CPU executes the next instruction.

10.3.3 Immediate Addressing Mode (IMM)

The operand for instructions with the immediate addressing mode is contained in the
byte(s) immediately following the opcode. The byte or bytes that follow the opcode are
the value of the statement rather than the address of the value. The pound symbol (#) is
used to indicate an immediate addressing mode operand. One very common
programming error is to accidentally omit the # symbol. This causes the assembler to
misinterpret the following expression as an address rather than explicitly provided data.
For example LDA #$55 means to load the immediate value $55 into the accumulator,
while LDA $55 means to load the value from address $0055 into the accumulator.
Without the # symbol, the instruction is erroneously interpreted as a direct addressing
instruction.
Example:
LDA
#$55
CPHX
#$FFFF
LDHX
#$67
132
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
NXP Semiconductors

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