Counter Low (Ftmx_Cntl) - NXP Semiconductors MC9S08SU16 Reference Manual

Memory map and register definition
BDM is active. This assures that if you were in the middle of reading a 16-bit register
when BDM became active, it reads the appropriate value from the other half of the 16-bit
value after returning to normal execution.
Address: 70h base + 1h offset = 71h
Bit 7
Read
Write
Reset
0
Field
COUNT_H Counter value high byte

19.4.5 Counter Low (FTMx_CNTL)

See the description for the Counter High register.
Address: 70h base + 2h offset = 72h
Bit 7
Read
Write
Reset 0
Field
COUNT_L Counter value low byte
19.4.6 Modulo High (FTMx_MODH)
The Modulo registers contain the high and low bytes of the modulo value for the FTM
counter. After the FTM counter reaches the modulo value, the overflow flag (TOF)
becomes set at the next clock, and the next value of FTM counter depends on the selected
counting method (Counter).
Writing to either byte latches the value into a buffer. The register is updated with the
value of their write buffer according to
This write coherency mechanism may be manually reset by writing to the SC register
whether BDM is active or not.
324
6 5
0 0
FTMx_CNTH field descriptions
6 5
0 0
FTMx_CNTL field descriptions
Update of the registers with write
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
4 3
COUNT_H
0 0
Description
4 3
COUNT_L
0 0
Description
2 1
0 0
2 1
0 0
buffers.
NXP Semiconductors
0
0
0
0