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CMP Functional Description
18.11.2.2 Stop Mode Operation
Subject to platform-specific clock restrictions, the comparator acts with two different
behaviors. For platforms which shut off peripheral's clock, none of the comparator
window, sample, and filter is available during stop modes. For platforms that can leave
the peripherals' clock optional, windowed, sampled, and filtered modes of operation
continue to operate in Stop4 and Stop3 modes if the clock to the peripheral is enabled for
stop. The MCU is brought out of stop when a compare event occurs and the
corresponding interrupt is enabled. Similarly, if CR1[OPE] is enabled, the comparator
output operates as in the normal operating mode and comparator output is placed onto the
external pin. In stop modes, the comparator can be operational in both high speed (HS)
comparison mode (CR1[PMODE] = 1) and low speed (LS) comparison mode
(CR1[PMODE] = 0), but it is recommended to use the low speed mode to minimize
power consumption.
If stop is exited with a reset, all comparator registers are put into their reset state.
18.11.2.3 Background Debug Mode Operation
When the microcontroller is in active background debug mode, the CMP continues to
operate normally.
18.11.3 Startup and Operation
A typical startup sequence is as follows.
The time required to stabilize COUT will be the power-on delay of the comparators plus
the largest propagation delay from a selected analog source through the analog
comparator, windowing function and filter. Power on delay of the comparators are
available from data sheets. The windowing function has a maximum of 1 bus clock
period delay. Filter delay is specified in
Low Pass
Filter.
During operation, the propagation delay of the selected data paths must always be
considered. It can take many bus clock cycles for COUT and the CFR/CFF status bits to
reflect an input change or a configuration change to one of the components involved in
the data path.
When programmed for filtering modes, COUT will initially be equal to zero until
sufficient clock cycles have elapsed to fill all stages of the filter. This occurs even if
COUTA is at a logic one.
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
312
NXP Semiconductors
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