Pwm Configure Register: High (Pwm_Cnfgh) - NXP Semiconductors MC9S08SU16 Reference Manual

Field
7 This field is reserved.
Reserved This read-only field is reserved and always has the value 0.
6–4 Bottom-side PWM Polarity Bit
BOTNEG
This write-protectable bit determines the polarity for the bottom-side PWMs.
NOTE: Each pair of PWM channels can be configured: channel zero to one, channel two to three, and
0 Positive bottom-side polarity
1 Negative bottom-side polarity
3–1 Independent or Complimentary Pair Operation
INDEP
This write-protectable bit determines if the motor control PWM channels are independent PWMs or
complementary PWM pairs.
NOTE: Each pair of PWM channels can be configured: channel zero to one, channel two to three, and
0 Complementary PWM pair
1 Independent PWMs
0 Write Protect
WP
This write-protectable bit enables write protection to be used for all write-protectable registers. While clear,
WP allows write-protectable registers to be written. When set, WP prevents any further writes to write-
protectable registers. After it is set, WP can be cleared only by a reset. Write-protectable registers include
CINVH, DMAP1L, DMAP1H, DMAP2L, DTIMnL, DTIMnH, CNFGL, CNFGH, and the CCTRLH[ENHA].
The CCTRLL[VLMODE], CCTRLL[SWP01], CCTRLL[SWP23], and CCTRLL[SWP45] bits are protected
when the CCTRLH[ENHA] bit is set to zero. CCTRLH[ENHA] is in turn protected by setting CNFGL[WP].
NOTE: The write to the CNFG register that sets the WP bit is the last write accepted to that register until
0 Write-protectable registers may written to
1 Write-protectable registers are read only

26.4.21 PWM Configure Register: High (PWM_CNFGH)

Address: 40h base + 17E1h offset = 1821h
Bit 7
Read 0
Write
Reset 0
Field
7 This field is reserved.
Reserved This read-only field is reserved and always has the value 0.
NXP Semiconductors
PWM_CNFGL field descriptions
channel four to five.
channel four to five.
the part is reset.
6 5
DBGEN WAITEN
0 0
PWM_CNFGH field descriptions
Table continues on the next page...
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 26 Pulse Width Modulator (PWM)
Description
4 3
0
EDG
0 0
Description
2 1
TOPNEG
0 0
0
0
521