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Section number
19.3
Signal description..........................................................................................................................................................320
19.3.1
EXTCLK - FTM external clock.................................................................................................................. 321
19.3.2
CHn - FTM channel (n) I/O pin.................................................................................................................. 321
19.4
Memory map and register definition.............................................................................................................................321
19.4.1
Module memory map..................................................................................................................................... 321
19.4.2
Register descriptions...................................................................................................................................... 321
19.4.3
Status and Control (FTMx_SC)..................................................................................................................... 322
19.4.4
Counter High (FTMx_CNTH)....................................................................................................................... 323
19.4.5
Counter Low (FTMx_CNTL)........................................................................................................................ 324
19.4.6
Modulo High (FTMx_MODH)...................................................................................................................... 324
19.4.7
Modulo Low (FTMx_MODL)....................................................................................................................... 325
19.4.8
Channel Status and Control (FTMx_CnSC).................................................................................................. 326
19.4.9
Channel Value High (FTMx_CnVH).............................................................................................................327
19.4.10 Channel Value Low (FTMx_CnVL)..............................................................................................................328
19.5
Functional Description..................................................................................................................................................329
19.5.1
Clock Source.................................................................................................................................................. 329
19.5.1.1
19.5.2
Prescaler......................................................................................................................................................... 330
19.5.3
Counter...........................................................................................................................................................330
19.5.3.1
19.5.3.2
19.5.3.3
19.5.3.4
19.5.4
Input capture mode.........................................................................................................................................332
19.5.5
Output compare mode.................................................................................................................................... 333
19.5.6
Edge-aligned PWM (EPWM) mode.............................................................................................................. 335
19.5.7
Center-aligned PWM (CPWM) mode............................................................................................................336
19.5.8
Update of the registers with write buffers......................................................................................................338
19.5.8.1
20
Counter Clock Source................................................................................................................ 329
Up counting................................................................................................................................331
Up-down counting......................................................................................................................331
Free running counter.................................................................................................................. 332
Counter reset.............................................................................................................................. 332
MODH:L registers..................................................................................................................... 338
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
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NXP Semiconductors
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