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BUSCLK
PWTCLK
PWTCNT
PWTIN
counter read result: 5 pwtclk
actual pulse width: 5 pwtclk + err
Figure 20-10. Example at PWTCLK is bus clock divided by 4
BUSCLK
PWTCLK
PWTCNT
PWTIN
counter read result: 2 pwtclk
actual pulse width: 2 pwtclk + err
Figure 20-11. Example at PWTCLK is bus clock divided by 8
20.8 Initialization/Application information
Following are the recommended steps to initialize the PWT module:
1. Configure PWTxCR to select clock source, set pre-scaler rate, select PWT input pin
and edge detection mode.
2. Set PWTIE, PRDYIE and POVIE bits in PWTxCS if corresponding interrupt is
desired to be generated.
3. Set PWTEN bit in PWTxCS to enable the pulse width measurement.
NXP Semiconductors
1
2
0
3
1
0
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
1
4
5
0
counter read result: 5 pwtclk
actual pulse width: 5 pwtclk + err
2
0
counter read result: 2 pwtclk
actual pulse width: 2 pwtclk + err
Chapter 20 Pules Width Timer (PWT)
2
3
4
5
(err < 1 pwtclk + 1 bus clock)
1
2
(err < 1 pwtclk + 1 bus clock)
0
0
359
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