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14.7.7 Low Voltage Control and Status Register 2 (V
(PMC_LVCTLSTAT2)
Address: 1850h base + 6h offset = 1856h
Bit
7
Read
Write
Reset
0
POR
0
Field
7–5
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
4
Low Voltage Warning Flag for VREFH
RLVWF
This read-only status bit indicates a low voltage warning event. RLVWF is set when V
below the trip point, or after reset and V
reset. Therefore, to use LVW interrupt function, before enabling RLVWIE, RLVWF must be cleared by
writing RLVWACK first.
0
Low voltage warning event is not detected.
1
Low voltage warning event is detected.
3
Low Voltage Warning Acknowledge
RLVWACK
This write-only bit is used to acknowledge low voltage warning errors. Write 1 to clear RLVWF. Reading
always returns 0.
2
Low Voltage Warning Interrupt Enable
RLVWIE
Enables hardware interrupt requests for RLVWF.
0
Hardware interrupt disabled (use polling).
1
Request a hardware interrupt when RLVWF = 1.
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
14.7.8 V
Configuration Register (PMC_VREFHCFG)
REFH
Address: 1850h base + 7h offset = 1857h
Bit
7
Read
0
Write
Reset
0
NXP Semiconductors
6
5
0
RLVWF
0
0
0
0
PMC_LVCTLSTAT2 field descriptions
Supply
6
5
0
f
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 14 Power Management Controller (PMC)
4
3
RLVWIE
RLVWACK
0
0
1
0
Description
is already below V
. RLVWF is set to 1 after power-on
LVW
4
3
T5V
f
f
)
REFH
2
1
0
0
0
0
0
transitions
Supply
2
1
f
f
0
0
0
0
f
227
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