NXP Semiconductors MC9S08SU16 Reference Manual page 18

Section number
17.7.2.2
17.7.2.3
17.7.2.4
17.7.2.5
17.7.2.6
18.1 CMP configuration information....................................................................................................................................289
18.2 ACMP in stop mode..................................................................................................................................................... 290
18.3 ....................................................................................................................................................................................... 0
18.3.1 ........................................................................................................................................................................ 0
18.3.2 ........................................................................................................................................................................ 0
18.4 Introduction...................................................................................................................................................................290
18.5 CMP Features................................................................................................................................................................291
18.6 6-bit DAC Key Features............................................................................................................................................... 291
18.7 ANMUX Key Features................................................................................................................................................. 292
18.8 CMP, DAC, and ANMUX Diagram.............................................................................................................................292
18.9 CMP Block Diagram.....................................................................................................................................................293
18.10 Memory Map/Register Definitions............................................................................................................................... 295
18.10.1 CMP Control Register 0 (CMP_CR0)........................................................................................................... 295
18.10.2 CMP Control Register 1 (CMP_CR1)........................................................................................................... 296
18.10.3 CMP Filter Period Register (CMP_FPR).......................................................................................................297
18.10.4 CMP Status and Control Register (CMP_SCR)............................................................................................ 298
18.10.5 DAC Control Register (CMP_DACCR)........................................................................................................299
18.10.6 MUX Control Register (CMP_MUXCR)...................................................................................................... 300
18.10.7 MUX Pin Enable Register (CMP_MUXPE)................................................................................................. 301
18.11 CMP Functional Description........................................................................................................................................ 301
18.11.1 CMP Functional Modes................................................................................................................................. 301
18.11.1.1
18
Pin leakage error........................................................................................................................ 285
Noise-induced errors.................................................................................................................. 285
Code width and quantization error.............................................................................................286
Linearity errors...........................................................................................................................287
Code jitter, non-monotonicity, and missing codes.....................................................................287
Chapter 18
Chip-specific ACMP information
Disabled Mode (# 1).................................................................................................................. 303
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Title Page
NXP Semiconductors