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12.3.4 ICS Control Register 4 (ICS_C4)
Address: 1848h base + 3h offset = 184Bh
Bit
7
Read
LOLIE
Write
Reset
0
* Notes:
•
SCFTRIM field: SCTRIM is loaded during reset from a factory programmed location when not in BDM mode. If in a BDM
mode, SCTRIM gets loaded with a value of 1b.
Field
7
Loss of Lock Interrupt
LOLIE
Determines if an interrupt request is made following a loss of lock indication. This field has an effect only
when ICS_S[LOLS] is set.
0
No request on loss of lock.
1
Generates an interrupt request on loss of lock.
6
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
5
Clock Monitor Enable
CME
Determines if a reset request is made following a loss of external clock indication. This field must be set to
a logic 1 only when the ICS is in an operational mode that uses the external clock (FEE, FBE, or FBELP).
0
Clock monitor is disabled.
1
Generates a reset request on loss of external clock.
4–1
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
0
Slow Internal Reference Clock Fine Trim
SCFTRIM
Controls the smallest adjustment of the internal reference clock frequency. Setting SCFTRIM will increase
the period and clearing SCFTRIM will decrease the period by the smallest amount possible.
ICS_C4[SCFTRIM] is automatically loaded during reset from a factory programmed location when not in a
debug mode. The factory programmed trim value adjusts the internal oscillator frequency to fint_ft as
specified in the datasheet. The user can provide a custom trim value to attain other internal reference
clock frequencies within the fint_t range. The custom fine trim bit value must be programmed into reserved
flash location 0x0000_FF6E and copied to ICS_C4 during code initialization.
NXP Semiconductors
6
5
0
CME
0
0
ICS_C4 field descriptions
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 12 Internal Clock Source (ICS)
4
3
0
0
0
Description
2
1
SCFTRIM
0
0
0
*
195
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